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State Diagram/Machine

A formal model (e.g., Finite State Machine, FSM) describing the behavior of a sequential circuit, where the output depends on current state and input.
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The statement of the theorem

A Finite State Machine (FSM) is formally defined as a 5-tuple ⟨Q,Σ,Input,Output,δ⟩\langle Q, \Sigma, \text{Input}, \text{Output}, \delta \rangle, where: \n1. QQ is the finite set of states. \n2. Σ\Sigma is the finite input alphabet. \n3. Input:Σ→Input\text{Input}: \Sigma \to \text{Input} maps inputs to output labels. \n4. Output:Q×Σ→Output\text{Output}: Q \times \Sigma \to \text{Output} defines the output based on the current state and input. \n5. δ:Q×Σ→Q\delta: Q \times \Sigma \to Q is the transition function, determining the next state qnext=δ(qcurrent,input)q_{next} = \delta(q_{current}, \text{input}). The machine's behavior is determined by the sequence of states q0,q1,q2,…q_0, q_1, q_2, \dots.